Unsurprisingly, Nvidia took advantage of Tuesday’s GTC to lift the veil on a new architecture: Nvidia Hopper, in honor of Grace Hopper. The Nvidia H100 chip is the first to use this architecture.
Two years after the introduction of the Ampere architecture that brilliantly animated the GeForce RTX 3000, the A-series chips for data centers, and the RTX A-series chips for professional PCs, Nvidia introduces a new architecture: Hopper.
An architecture for professionals
We must first make an important point of explanation. Where Ampere was an architecture designed for both the gaming and professional markets, Nvidia has chosen to work on two architectures for its new generation of products. During the GTC On Tuesday, its developer conference, Nvidia introduced Hopper for professionals, and we’re looking forward to the start of the school year. the Ada Lovelace architecture for the GeForce RTX 4000.
However, it is still very interesting to discover the news that Hopper offers to glimpse what Nvidia could bring to the general public in the coming years.
80 billion transistors, 4nm fabrication
This is the announcement of all superlatives for Nvidia. The firm introduced both the Hopper architecture and the H100 chip, the first to use this architecture. A chip that will still gather 80 billion transistors, making it the largest and most powerful accelerator in the world, according to Nvidia. We are under the 114 billion transistors of the chip Apple M1 Ultrabut the latter is a SoC that integrates many components.
To make this chip, Nvidia uses TSMC and its new 4nm manufacturing process. Recall that Nvidia had chosen Samsung as a manufacturing partner for Ampere chips in 8nm. This chip can be associated with latest generation HBM3 memory, allowing a bandwidth of 3 TB/s. With such bandwidth, Nvidia advertises that only 20 Hopper H100 chips are needed to support global Internet traffic. Enough to imagine applications in the field of AI on a global scale and in real time.
Another characteristic element of Hopper: the transition to the 4th generation of Nvidia NVLink, which allows up to 256 H100 chips to be scaled in a data center, improving up to 9 times the bandwidth compared to the previous generation. The H100 chip is the first to natively support PCI Express 5.0 to maximize bandwidth on servers using this protocol.
In front of Ampere, Nvidia does not hesitate to announce an improvement in computing power from 3 to 4x to reach dizzying levels: 4000 TFLOps in FP8, 2000 TFLOPS in FP16 and 60 TFLOPS in FP32/FP64.
Nvidia’s Transformative Engine
At the core of the Nvidia Hopper architecture is the Transformer engine, which should significantly increase the chip’s AI capabilities and performance. The name directly refers to the transformer, an increasingly popular and promising technology in the field of artificial intelligence. OpenAI’s Google BERT or GPT-3 is based on the transformer model. This model is increasingly used in fields related to translation, image analysis or health research.
The integration of the Transformer Engine should allow, according to Nvidia, to speed up artificial neural networks up to 6 times compared to the previous generation.
Nvidia offered several performance comparisons between the last generation H100 and the Ampere A100 chip. With serial GPU scaling, Nvidia promises a performance boost of up to nine times, reducing training time from 7 days to just 20 hours.
Release in the 3rd quarter
Nvidia Hopper will be available to professionals starting in the third quarter. The firm has already signed on with leading industry partners such as Dell, Fujistsu, Supermicro, Cisco, Atos, and Hewlett Packard Enterprise, to offer H100-powered products.
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